Intel System Validation Enginerer in Eau Claire, Wisconsin
Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platform level tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on die debug features.
Bachelor's and/or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or related field.
Minimum of 1 year experience in the following areas:
Proficiency coding with object oriented I.e. C/C++ and scripting languages I.e. Perl/Python in a Linux based environment-
Excellent debugging and problem solving skills-
Inside this Business Group
Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.